A Multimodulation Times SVPWM for Dead-Time Effect Elimination in Three-Level Neutral Point Clamped Converters

被引:19
|
作者
Diao, Naizhe [1 ]
Sun, Xianrui [1 ]
Song, Chonghui [1 ]
Zhang, Qiang [2 ]
Zhang, Zikuo [1 ]
机构
[1] Northeastern Univ, Coll Informat Sci & Engn, Shenyang 110819, Liaoning, Peoples R China
[2] China Elect Technol Grp Corp, Res Inst 54, Shijiazhuang 050081, Hebei, Peoples R China
基金
中国国家自然科学基金;
关键词
Space vector pulse width modulation; Switches; Phase modulation; Clamps; Distortion; Mathematical model; Dead-time effect (DTE); multimodulation times (MMT); space vector pulsewidth modulation (SVPWM); three-level neutral point clamped (NPC) converter;
D O I
10.1109/TIE.2020.2998737
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In order to improve the speed regulation performance of induction motors, a multimodulation times space vector pulsewidth modulation (MMT-SVPWM) is proposed for the three-level neutral point clamped (NPC) converter. This method can eliminate the dead-time effect (DTE), which is caused by the addition of the dead time (DT) in the SVPWM. This article first analyzes the deviation of the output voltage that is caused by the DTE in the SVPWM, and then proposed the MMT-SVPWM. The generation of driving signals in this method is different from the ideal SVPWM. According to the directions of three-phase currents, the driving signals of a pair of complementary power switches are obtained by comparing a pair of multiple modulation times with the triangular carrier. Thus, this method directly eliminate the DTE, which is different from the SVPWM with DT. The output voltage vector is the same as that of the ideal SVPWM, and there is no zero-current clamping effect. Finally, the simulation and experimental results show that the proposed method effectively eliminates the DTE and improves the output currents of the three-level NPC converter.
引用
收藏
页码:5476 / 5485
页数:10
相关论文
共 50 条
  • [21] DC Component Self-Balancing Analysis of Neutral-Point in Neutral-Point-Clamped Three-Level Converters
    Wan, Wenchao
    Chen, Changsong
    Duan, Shanxu
    Hu, WenHao
    Song, Lei
    [J]. 2020 IEEE 9TH INTERNATIONAL POWER ELECTRONICS AND MOTION CONTROL CONFERENCE (IPEMC2020-ECCE ASIA), 2020, : 1752 - 1757
  • [22] A Narrow Pulse Compensation Method for Neutral-Point-Clamped Three-Level Converters Considering Neutral-Point Balance
    Guan, Bo
    Wang, Chenchen
    [J]. 2015 9TH INTERNATIONAL CONFERENCE ON POWER ELECTRONICS AND ECCE ASIA (ICPE-ECCE ASIA), 2015, : 2770 - 2775
  • [23] A Mathematical Structural Modulation Method for Neutral-Point Potential Balancing of Three-Level Neutral-Point-Clamped Converters
    Wang, Hui
    Ha, Lifang
    Lin, Jianheng
    Wang, Sizheng
    Xie, Shiming
    Chen, Xida
    Su, Mei
    [J]. IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2024, 12 (02) : 1573 - 1582
  • [24] SVPWM Scheme for Three-Level Converters with Neutral-Point Potential Balancing and Switching Loss Reduction
    Luo, Rui
    He, Yingjie
    Chen, Hui
    Liu, Jinjun
    [J]. Diangong Jishu Xuebao/Transactions of China Electrotechnical Society, 2018, 33 (14): : 3245 - 3254
  • [25] Common-Mode Voltage Reduction in Three-level Neutral-Point-Clamped Converters with Neutral Point Voltage Balance
    Yuan, Xibo
    Yon, Jason
    Mellor, Phillip
    [J]. 2013 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS (ISIE), 2013,
  • [26] Vector-Based Dead-Time Compensation for Three-Level T-Type Converters
    Li, Xiong
    Akin, Bilal
    Rajashekara, Kaushik
    [J]. IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2016, 52 (02) : 1597 - 1607
  • [27] SVPWM Strategies for Three-level T-type Neutral-point-clamped Indirect Matrix Converter
    Nguyen Dinh Tuyen
    Le Minh Phuong
    Lee, Hong-Hee
    [J]. JOURNAL OF POWER ELECTRONICS, 2019, 19 (04) : 944 - 955
  • [28] Hybrid PWM strategy of SVPWM and VSVPWM for neutral point-clamped three-level voltage source inverter
    Jiang, Wei-Dong
    Du, Shao-Wu
    Shi, Xiao-Feng
    Bao, Xiao-Hua
    [J]. Zhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering, 2009, 29 (18): : 47 - 53
  • [29] A Carrier-Based SVPWM Begins with the Zero Voltage Vector for Three-Level Neutral Point Clamped Converter
    Gao, Zhan
    Ge, Qiongxuan
    Li, Yaohua
    Zhao, Lu
    Zhang, Bo
    [J]. Diangong Jishu Xuebao/Transactions of China Electrotechnical Society, 2020, 35 (10): : 2194 - 2205
  • [30] Analysis and compensation of Dead-time effect in multi-level diode clamped VSI based on simplified SVPWM
    Piao, Chengzhu
    Hung, John Y.
    [J]. PROCEEDINGS OF THE 2015 10TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS, 2015, : 375 - 380