Device integration of a 0.35 mu m CMOS on shallow SIMOX technology for high-speed and low-power applications.

被引：3
|
作者：
Adan, AO [1 ]
Naka, T [1 ]
Kaneko, S [1 ]
Urabe, D [1 ]
Higashi, K [1 ]
Kagisawa, A [1 ]
机构：
[1] SHARP CO LTD,VLSI DEV LAB,IC GRP,TENRI,NARA 632,JAPAN
来源：
1996 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS | 1996年
关键词：
D O I：
10.1109/SOI.1996.552521
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：116 / 117
页数：2
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