Design Implementation and Analysis of Different SRAM Cell Topologies

被引:3
|
作者
MuraliMohanBabu, Y. [1 ]
Mishra, Suman [2 ]
Radhika, K. [3 ]
机构
[1] SITAMS, ECE Dept, Chittoor, Andhra Pradesh, India
[2] CMREC, ECE Dept, Hyderabad, Telangana, India
[3] GIST, ECE Dept, Nellore, Andhra Pradesh, India
关键词
SRAM; Topology; Leakage Control Transistors; decoder;
D O I
10.1109/ESCI50559.2021.9396938
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper thinks about the presentation of five SRAM cell geographies, which incorporate the customary 6T, 7T, 8T, 9T, and the 10T SRAM cell executions. Specifically, the spillage flows, spillage force, and read conduct of each SRAM cells are analyzed. In 10T SRAM cell usage results, diminished spillage force, and spillage current by 36% and 64% separately, the real strength is expanded by 13% over regular 6T, 7T, 8T, and 9T SRAM cells. Subsequently, the 10T SRAM consistently expends the least spillage force and spillage current; improve read solidness when contrasted with the 6T, 7T, 8T, and 9T SRAM cells. The point of this paper is to diminish the spillage power, spillage current and improve the read conduct of the distinctive SRAM cell structures utilizing rhythm device at 45nm innovation while keeping the peruse and compose get to a time and the force as low as could reasonably be expected.
引用
收藏
页码:678 / 682
页数:5
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