Three-Dimensional Integrated Circuits and Stacked CMOS Image Sensors using Direct Bonding of SOI Layers

被引：0
|
作者：
Goto, Masahide [1 ]
Hagiwara, Kei [1 ]
Iguchi, Yoshinori [1 ]
Ohtake, Hiroshi [1 ]
Saraya, Takuya [2 ]
Kobayashi, Masaharu [2 ]
Higurashi, Eiji [2 ]
Toshiyoshi, Hiroshi [2 ]
Hiramoto, Toshiro [2 ]
机构：
[1] NHK Sci & Technol Res Labs, Setagaya Ku, 1-10-11 Kinuta, Tokyo 1578510, Japan
[2] Univ Tokyo, Meguro Ku, Tokyo 1538505, Japan
来源：
2015 INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC 2015) | 2015年
关键词：
CMOS integrated circuits; CMOS image sensors; silicon-on-insulator (SOI); three-dimensional integration;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We report on three-dimensionally (3D) integrated circuits and stacked CMOS image sensors by using the direct bonding of silicon-on-insulator (SOI) layers. Since the developed process allows small embedded Au electrodes by damascene process, high-density integration is possible within an image sensor pixel area of a few micrometers, beyond the limit of the conventional technique such as through silicon vias (TSVs). We confirmed a successful operation of the developed 3D integrated circuits with NFETs and PFETs bonded from separate wafers. We also demonstrated stacked CMOS image sensor with pixel wise 3D integration, which indicates that our technology is promising for high-density integrated circuits and CMOS image sensors.
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页数：4
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