Design issues in the implementation of versatile, high-speed iterative decoders

The ever increasing demand for high data rate communication, and the use of radio resource management techniques requiring frame-by-frame adaptive coding/modulation to match user demands and channel conditions, pose a number of crucial problems to the design of versatile, high-speed iterative decoders, for both turbo-like and low-density parity-check codes. Among them, we mention: The modification of the Soft-Input Soft-Output (SISO) algorithm in a way that permits its implementation using several parallel processors working independently on segments of the received frame. The collisions in the process of reading/writing into/from the memory by the parallel processors. The design of prunable interleavers covering a wide range of information and/or code words lengths while keeping good spreading properties. The design of codes yielding a wide range of code rates with good performance for the range of probability of error of interest. The paper will touch all the previous points, offering state-of-the art solutions and examples showing their performance. Copyright (C) 2007 John Wiley & Sons, Ltd.