Rapid prototyping of dataflow programs on hardware/software architectures

被引:0
|
作者
Eisenring, M [1 ]
Teich, J [1 ]
Thiele, L [1 ]
机构
[1] ETH Zurich, Swiss Fed Inst Technol, TIK, Comp Engn & Commun Networks Lab, CH-8092 Zurich, Switzerland
关键词
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中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, the problem of automatically mapping large-grain dataflow programs onto heterogeneous hardware/software architectures is treated. Starting with a given hardware/software partition, interfaces are inserted into the specification to account for communication, in particular across hardware/software boundaries. Depending on the target architecture, the interfaces are refined according to given communication constraints (bus protocols, memory mapping, interrupts, DMA, etc.). A framework is described that uses an object-oriented approach to transform a given dataflow graph and to generate code for the actors as well as for the interfaces. The object-orientation enables an easy migration (retargeting) of typical communication primitives to other target architectures.
引用
收藏
页码:187 / 196
页数:10
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