Integer summing algorithms on reconfigurable meshes

被引:17
|
作者
Nakano, K [1 ]
Wada, K
机构
[1] Nagoya Inst Technol, Dept Elect & Comp Engn, Showa Ku, Nagoya, Aichi 466, Japan
[2] Hitachi Ltd, Adv Res Lab, Hatoyama, Saitama 35003, Japan
关键词
D O I
10.1016/S0304-3975(97)00007-8
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper presents the following algorithms to compute the sum of n d-bit integers on reconfigurable parallel computation models: (1) a constant-time algorithm on a reconfigurable mesh of the bit model of size root nlog((O(1))) n x d root n, (2) an O(log*n)-time algorithm on a reconfigurable mesh of the bit model of size root n/log* n x d root n/log* n, (3) an O(log d + log* n)-time algorithm on a reconfigurable mesh of the word model of size root n/(log d + log* n) x root n/(log d + log* n), and (4) an O(log* n)-time algorithm on VLSI reconfigurable circuit of area O(dn/log* n). (C) 1998 - Elsevier Science B.V. All rights reserved.
引用
收藏
页码:57 / 77
页数:21
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