Implementation of Low Power Programmable Flash ADC Using IDUDGMOSFET

被引:2
|
作者
Mukherjee, Sagar [1 ]
Dutta, Arka [1 ]
Roy, Swarnil [1 ]
Sarkar, Chandan Kumar [1 ]
机构
[1] Jadavpur Univ, Kolkata 700032, India
关键词
Symmetric DGMOS; flash ADC; non linearity; programmable circuit; low power circuit; SUBTHRESHOLD ANALOG/RF PERFORMANCE; UNDERLAP DG FETS; DEVICE; CMOS; ENHANCEMENT; DISTORTION; MOSFETS; SILICON; MODEL;
D O I
10.1109/TCSII.2017.2728619
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this brief, a novel programmable low power analog-to-digital converter (ADC) circuit design is proposed using independently driven underlap double gate MOSFET (IDUDGMOS) to operate in radio frequency domain and its performance is studied. The primary motivation of the design is to eliminate the need for a resistor ladder for reference voltage selection and to minimize the number of transistor used in the flash ADCs. The proposed design utilizes the back gate voltage controllability of IDUDGMOS for varying reference voltage of the comparators in the ADCs. The parameters of the designed ADC analyzed are the bandwidth, the linearity, and the power consumption of the circuit. The proposed circuit offers wider bandwidth and lower power consumption compared to earlier ADC designs.
引用
收藏
页码:844 / 848
页数:5
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