Data retention times in SOI-DRAMs

被引：1
|
作者：
Kim, HS [1 ]
Choi, DU [1 ]
Lee, SH [1 ]
Lee, SK [1 ]
Park, JK [1 ]
Kim, KN [1 ]
Park, JW [1 ]
机构：
[1] SAMSUNG ELECT CO,TECHNOL DEV,MEMORY DEVICE BUSINESS,KIHEUNG EUP,KYUNGKI DO,SOUTH KOREA
来源：
1996 SYMPOSIUM ON VLSI TECHNOLOGY: DIGEST OF TECHNICAL PAPERS | 1996年
关键词：
D O I：
10.1109/VLSIT.1996.507819
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：126 / 127
页数：2
相关论文
共 50 条
  • [1] Innovative Capacitorless SOI DRAMs
    Cristoloveanu, S.
    Bawedin, M.
    Wan, J.
    Chang, S-J.
    Navarro, C.
    Zaslavsky, A.
    Le Royer, C.
    Andrieu, F.
    Rodriguez, N.
    Gamiz, F.
    IEEE INTERNATIONAL SOI CONFERENCE, 2012,
  • [2] A LARGE VDS DATA RETENTION TEST PATTERN FOR DRAMS
    FRANCH, RL
    DHONG, SH
    SCHEUERLEIN, RE
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (08) : 1214 - 1217
  • [3] A New Investigation of Data Retention Time in Truly Nanoscaled DRAMs
    Kim, Kinam
    Lee, Jooyoung
    IEEE ELECTRON DEVICE LETTERS, 2009, 30 (08) : 846 - 848
  • [4] An FPGA-Based Test Platform for Analyzing Data Retention Time Distribution of DRAMs
    Hou, Chih-Sheng
    Li, Jin-Fu
    Lo, Chih-Yen
    Kwai, Ding-Ming
    Chou, Yung-Fa
    Wu, Cheng-Wen
    2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), 2013,
  • [5] An FPGA-Based Test Platform for Analyzing Data Retention Time Distribution of DRAMs
    Hou, Chih-Sheng
    Li, Jin-Fu
    Lo, Chih-Yen
    Kwai, Ding-Ming
    Chou, Yung-Fa
    Wu, Cheng-Wen
    2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), 2013,
  • [6] Efficient error correction code configurations for quasi-nonvolatile data retention by DRAMs
    Katayama, Y
    Negishi, Y
    Morioka, S
    IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2000, : 201 - 209
  • [7] A long data retention SOI DRAM with the body refresh function
    Tomishima, S
    Morishita, F
    Tsukude, M
    Yamagata, T
    Arimoto, K
    IEICE TRANSACTIONS ON ELECTRONICS, 1997, E80C (07) : 899 - 904
  • [8] A long data retention SOI-DRAM with the body refresh function
    Tomishima, S
    Morishita, F
    Tsukude, M
    Yamagata, T
    Arimoto, K
    1996 SYMPOSIUM ON VLSI CIRCUITS - DIGEST OF TECHNICAL PAPERS, 1996, : 198 - 199
  • [9] Design and performance of SOI pass transistors for 1Gbit DRAMs
    Hu, Y
    Teng, CW
    Houston, TW
    Joyner, K
    Aton, TJ
    1996 SYMPOSIUM ON VLSI TECHNOLOGY: DIGEST OF TECHNICAL PAPERS, 1996, : 128 - 129
  • [10] A novel pattern transfer process for bonded SOI Giga-bit DRAMs
    Lee, BH
    Bae, GJ
    Lee, KW
    Cha, G
    Kim, WD
    Lee, SJ
    Barge, T
    AubertonHerve, AJ
    Lamure, JM
    1996 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS, 1996, : 114 - 115
12345