New failure mode induced by electric current in flip chip solder joint

被引:0
|
作者
Lin, YH [1 ]
Hu, UC [1 ]
Tsai, J [1 ]
Kao, CR [1 ]
机构
[1] Natl Cent Univ, Dept Chem & Mat Engn, Taoyuan 320, Taiwan
关键词
flip chip; eutectic Sn-Pb; current density; Cu dissolution;
D O I
10.1109/EMAP.2002.1188846
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The effect of electric current on the failure mechanism flip chip solder joints was studied. The solder used was Pb-Sn eutectic, and the joints had a diameter of 100 mu m. The soldering pad on the chip-side had a Cu metallurgy, and that on the board-side had an Au/Ni/Cu metallurgy. The flip chip packages were placed in an oven set at 100 degreesC, with 2x10(4) A/cm(2) electric current passing through some of the joints in the packages. The rest of the solder joints, which were in the same package but without current passing through, were used as control. During current stressing, the chip surface temperature reached 157degreesC due to joule heating. A new failure mode induced by the electric cur-rent was found. The joints failed by very extensive Cu dissolution on the chip-side. Not only part of the Cu soldering pad was dissolved, but also part of the internal Cu conducting trace within the chip. The dissolved region was back-filled with solder. Large amount of Cu6Sn5 intermetallic was present inside the solder joint. The source of Cu in Cu6Sn5 was from the dissolved Cu pad and trace. The site of failure was at the conducting trace that had been back-filled with solder, where a much greater current density was present due to a smaller cross-section.
引用
收藏
页码:253 / 258
页数:6
相关论文
共 50 条
  • [31] Impact of solder pad size on solder joint reliability in flip chip PBGA packages
    Mercado, L
    Sarihan, V
    Guo, YF
    Mawer, A
    49TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 1999 PROCEEDINGS, 1999, : 255 - 259
  • [32] Solder joint reliability of plastic ball grid array with solder bumped flip chip
    Lee, SWP
    Lau, JH
    SOLDERING & SURFACE MOUNT TECHNOLOGY, 2000, 12 (02) : 16 - 23
  • [33] Impact of solder pad size on solder joint reliability in flip chip PBGA packages
    Mercado, Lei
    Sarihan, Vijay
    Guo, Yifan
    Mawer, Andrew
    Proceedings - Electronic Components and Technology Conference, 1999, : 255 - 259
  • [34] Solder bump on copper stud (SBC) method of forming the solder joint in flip chip
    Tangpuz, C
    Cabahug, EA
    55th Electronic Components & Technology Conference, Vols 1 and 2, 2005 Proceedings, 2005, : 280 - 283
  • [35] Impact of solder pad size on solder joint reliability in flip chip PBGA packages
    Mercado, LL
    Sarihan, V
    Guo, YF
    Mawer, A
    IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2000, 23 (03): : 415 - 420
  • [36] Stochastic simulation of electromigration failure of flip chip solder bumps
    Tang, Z
    Shi, FG
    MICROELECTRONICS JOURNAL, 2001, 32 (01) : 53 - 60
  • [37] An Investigation into Thermomigration Failure of Flip Chip Solder Joint Interconnects Used in High-Reliability Applications
    Morey A.M.
    Popelar S.
    Hook J.
    Journal of Microelectronics and Electronic Packaging, 2022, 19 (02): : 77 - 82
  • [38] Characteristics of current crowding in flip-chip solder bumps
    Lai, YS
    Kao, CL
    MICROELECTRONICS RELIABILITY, 2006, 46 (5-6) : 915 - 922
  • [39] Failure induced by thermomigration of interstitial Cu in Pb-free flip chip solder joints
    Chen, Hsiao-Yun
    Chen, Chih
    Tu, King-Ning
    APPLIED PHYSICS LETTERS, 2008, 93 (12)
  • [40] An automated ultrasonic inspection approach for flip chip solder joint assessment
    Yang, Ryan S. H.
    Braden, Derek R.
    Zhang, Guang-Ming
    Harvey, David M.
    MICROELECTRONICS RELIABILITY, 2012, 52 (12) : 2995 - 3001