A scalable cache coherent architecture for large-scale mesh-connected multiprocessors

被引:0
|
作者
Rhee, Y [1 ]
Lee, J [1 ]
机构
[1] Korea Adv Inst Sci & Technol, Dept Comp Sci, Taejon 305701, South Korea
关键词
D O I
10.1109/ISPAN.1997.645056
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Until now, various limited directory-based cache coherence protocols were proposed for medium- or large-scale multiprocessors while employing scalable directory memories. For widely shared data, however, most protocols suffer from extraneous cache-invalidates or updates due to insufficient pointers. We focus on large-scale mesh-connected multiprocessors built on top of wormhole and dimension ordered routing networks. In such networks, worms are major bricks for communications, which transit all the intermediate nodes on its way to a destination. From such air observation. we propose a new directory-based protocol DirQ with limited pointers, which can represent either one node or a set of nodes when being widely shared. For root N x root N processors system, our protocol needs Theta(N-3/2 log N) bits for directory memory which is much more scalable compared to the full-map protocol. In terms of latency and traffic volume for cache coherence, our analytic models show that DirQ outperforms other limited protocols, and further comparable to the full-map one.
引用
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页码:64 / 70
页数:7
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