A new thermal-conscious system-level methodology for energy-efficient processor voltage selection

In this paper, we propose a thermal-conscious system-level methodology to make energy-efficient voltage selection (VS) for nanometer processors under real-time constraints. New modeling parameters such as power composition ratio (PCR), thermal resistance, are integrated and considered in our system models, and their impacts on energy consumption are explored. The interdependence between temperature and power is modeled in an iterative way and two nonlinear programming formulations are presented to determine the optimal energy-efficient supply voltages. Our experiment results show that the energy estimation discrepancy given by the thermal-conscious and traditional system models can reach up to 50% In 65nm PTM CMOS technology, which again underscores the necessity of a thermal-aware power model. Furthermore, our thermal-conscious voltage selection (TCVS) approach can achieve up to 12% further energy savings and much lower peak temperature than the traditional approach. Finally, our specific temperature voltage selection (STVS) approach can reduce the computation complexity greatly with acceptable energy overheads compared with TCVS.