Modeling the High-Frequency Degradation of Phase/Frequency Detectors

被引：11

作者：

Chen, Roger Yubtzuan ^{[1
]}

Yang, Zong-Yi ^{[1
]}

机构：

[1] Natl Yunlin Univ Sci & Technol, Dept Elect Engn, Doulio 64002, Taiwan

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2010年 / 57卷 / 05期

关键词：

D-type flip-flops (DFFs); modeling; phase/frequency detectors (PFDs); phase-locked loops (PLLs); PHASE-LOCKED LOOPS; PLL; DESIGN; CMOS; DLL;

D O I：

10.1109/TCSII.2010.2047327

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The gain of a widely used sequential-type phase/frequency detector (PFD) as a function of its input frequency is modeled adopting a continuous-time approximation. High-frequency gain degradation is described by a frequency-dependent attenuation factor characterized in terms of the propagation delays of the PFD. The attenuation factor can be readily included in the dynamics equations of phase-locked loop to account for the effect of the PFD degradation. Gain-modeling-related delay components of a complimentary metal-oxide-semiconductor PFD are also described. The high-frequency model is in good agreement with the simulation results of the PFD.

引用

页码：394 / 398

页数：5

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