Improved compact model for double-gate tunnel field-effect transistors by the rigorous consideration of gate fringing field

In this work, the accuracy of a compact current-voltage (I-V) model for double-gate n-channel tunnel field-effect transistors (TFETs) is improve by considering outer and inner gate fringing field effects. The refined model is benchmarked against technology computer-aided design (TCAD) device simulations and compared against a previously published compact model. The normalized root-mean-square error for current in the linear region of operation (i.e., for 0.05V drain voltage) is reduced from similar to 593 to similar to 5%. (C) 2017 The Japan Society of Applied Physics