Performance Analysis of 8T FinFET SRAM Bit-Cell for Low-power Applications

被引：0

作者：

Birla, Shilpi ^{[1
]}

Shukla, Neeraj K. ^{[2
]}

Singh, Neha ^{[1
]}

Raja, Ram Kumar ^{[2
]}

机构：

[1] Manipal Univ Jaipur, Dept Elect & Commun Engn, Jaipur, Rajasthan, India

[2] King Khalid Univ, Elect Engn Dept, Abha, Saudi Arabia

来源：

PROCEEDINGS OF THE 2020 5TH INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND SECURITY (ICCCS-2020) | 2020年

关键词：

SRAM; FinFET; Static Noise Margin; Leakage Power; SUBTHRESHOLD SRAM;

D O I：

10.1109/icccs49678.2020.9277237

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

FinFET emerged as one of the popular technologies which are replacing the MOS SRAM because of the similarity in the fabrication process and the most attractive advantage is low leakage and high stability. So, many FinFET structures have been proposed like Shorted Gate FinFET which is almost similar to CMOS devices. In, this paper, we have analyzed 8T FinFET SRAM using SG and LP-IG mode for leakage power and stability issues. The LP-IG mode is used to increase the stability and performance of the circuit. A comparison is made between the shorted gate 8T SRAM and LP mode SRAM for leakage power and SNM. SRAM has been simulated at 20nm PTM technology. It has been found that leakage power has been reduced by 29% and SNM improved by 5 % using LP-IG mode of FinFET at a supply voltage of 0.5V. The supply voltage has been scaled from 1V to 0.5V for low power applications. So, the circuit is simulated for the subthreshold region of operation also.

引用

页数：4

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