Common-Centroid Layouts for Analog Circuits: Advantages and Limitations

被引：0

作者：

Sharma, Arvind K. ^{[1
]}

Madhusudan, Meghna ^{[1
]}

Burns, Steven M. ^{[2
]}

Mukherjee, Parijat ^{[2
]}

Yaldiz, Soner ^{[2
]}

Ilarjani, Ramesh ^{[1
]}

Sapatnekar, Sachin S. ^{[1
]}

机构：

[1] Univ Minnesota, Minneapolis, MN 55455 USA

[2] Intel Corp, Hillsboro, OR USA

来源：

PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021) | 2021年

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Common-centroid (CC) layouts are widely used in analog design to make circuits resilient to variations by matching device characteristics. However, CC layout may involve increased routing complexity and higher parasitics than other alternative layout schemes. This paper critically analyzes the fundamental assumptions behind the use of common-centroid layouts, incorporating considerations related to systematic and random variations as well as the performance impact of common-centroid layout. Based on this study, conclusions are drawn on when CC layout styles can reduce variation, improve performance (even if they do not reduce variation), and when non-CC layouts are preferable.

引用

页码：1224 / 1229

页数：6

共 41 条

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