Tolerating multiple faults in multistage interconnection networks with minimal extra stages

被引:36
|
作者
Fan, CC [1 ]
Bruck, J [1 ]
机构
[1] CALTECH, Dept Elect Engn, Pasadena, CA 91125 USA
基金
美国国家航空航天局; 美国国家科学基金会;
关键词
Multistage Interconnection Networks (MIN); fault tolerance; extrastage; switch faults; stage masks;
D O I
10.1109/12.869334
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In their 1982 paper. Adams and Siegel proposed an Extra Stage Cube Interconnection Network that tolerates one switch failure with one extra stage. We extend their results and discover a class of Extra Stage Interconnection Networks that tolerate multiple switch failures with a minimal number of extra stages. Adopting the same fault model as Adams and Siegel, the faulty switches can be bypassed by a pair of demultiplexer/multiplexer combinations. It is easy to show that, to maintain point to point and broadcast connectivities. there must be at least of extra stages to tolerate f switch failures. We present the first known construction of an Extra Stage Interconnection Network that meets this lower-bound. This n-dimensional Multistage Interconnection Network has n + f stages and tolerates f switch failures. An n-bit label called mask is used for each stage that indicates the bit differences between the two inputs coming into a common switch. We designed the fault-tolerant construction such that it repeatedly uses the singleton basis of the n-dimensional vector space as the stage mask vectors. This construction is further generalized and we prove that an n-dimensional Muitistage Interconnection Network is optimally fault-tolerant if and only if the mask vectors of every n consecutive stages span the n-dimensional vector space.
引用
收藏
页码:998 / 1004
页数:7
相关论文
共 50 条
  • [1] Diagnosis of stuck-at faults in multistage interconnection networks
    Das, S.
    Chaudhuri, A.
    Journal of the Institution of Engineers (India), Part CP: Computer Engineering Division, 1994, 75
  • [2] A Kind of Multistage Interconnection Networks with Multiple Paths
    周应权
    闵应骅
    Journal of Computer Science and Technology, 1996, (04) : 395 - 404
  • [3] On detecting multiple faults in baseline interconnection networks
    Lin, SS
    Chen, ST
    COMPUTER JOURNAL, 1998, 41 (04): : 254 - 269
  • [4] Tolerating multiple faults in WDM networks without wavelength conversion
    Sue, CC
    Yeh, JY
    Chen, YC
    Huang, CY
    TENCON 2004 - 2004 IEEE REGION 10 CONFERENCE, VOLS A-D, PROCEEDINGS: ANALOG AND DIGITAL TECHNIQUES IN ELECTRICAL ENGINEERING, 2004, : C89 - C92
  • [5] Multiple path versus multiple passes in multistage interconnection networks
    Sharma, NK
    TRANSACTIONS OF THE SOCIETY FOR COMPUTER SIMULATION, 1997, 14 (03): : 153 - 164
  • [6] TOLERATING FAULTS IN SYNCHRONIZATION NETWORKS
    BHATT, SN
    LEIGHTON, FT
    CHUNG, FRK
    ROSENBERG, AL
    LECTURE NOTES IN COMPUTER SCIENCE, 1992, 634 : 1 - 12
  • [7] ON THE NUMBER OF PERMUTATIONS PERFORMABLE BY EXTRA-STAGE MULTISTAGE INTERCONNECTION NETWORKS
    GAZIT, I
    MALEK, M
    IEEE TRANSACTIONS ON COMPUTERS, 1989, 38 (02) : 297 - 302
  • [8] FT-DRB: A Method for Tolerating Dynamic Faults in High-Speed Interconnection Networks
    Zarza, Gonzalo
    Lugones, Diego
    Franco, Daniel
    Luque, Emilio
    PROCEEDINGS OF THE 18TH EUROMICRO CONFERENCE ON PARALLEL, DISTRIBUTED AND NETWORK-BASED PROCESSING, 2010, : 77 - 84
  • [9] Design schemes and performance analysis of dynamic rerouting interconnection networks for tolerating faults and preventing collisions
    Chen, CW
    Ku, CJ
    Chang, CH
    PARALLEL AND DISTRIBUTED PROCESSING AND APPLICATIONS, 2005, 3758 : 168 - 179
  • [10] Deadlock Avoidance for Interconnection Networks with Multiple Dynamic Faults
    Zarza, Gonzalo
    Lugones, Diego
    Franco, Daniel
    Luque, Emilio
    PROCEEDINGS OF THE 18TH EUROMICRO CONFERENCE ON PARALLEL, DISTRIBUTED AND NETWORK-BASED PROCESSING, 2010, : 276 - 280