A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications

被引：0
|
作者：
Park, Chanik
Cheon, Wonmoon
Lee, Yangsup
Jung, Myoung-Soo
Cho, Wonhee
Yoon, Hanbin
机构：
来源：
RSP 2007: 18th IEEE/IFIP International Workshop on Rapid System Prototyping, Proceedings | 2007年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.
引用
收藏
页码：202 / 208
页数：7
相关论文
共 50 条
  • [31] ReCA-FTL: Resource Contention Aware Flash Translation Layer
    Jin, Youngbin
    Lee, Dongjun
    Jang, Han
    Lee, Ben
    2022 IEEE INTERNATIONAL CONFERENCE ON NETWORKING, ARCHITECTURE AND STORAGE (NAS), 2022, : 176 - 183
  • [32] Research and Implementation of NAND-Flash Invalid Block Management Algorithm in FTL Layer
    Li Youmeng
    Li Qingcheng
    Gong Xiaoli
    2011 AASRI CONFERENCE ON ARTIFICIAL INTELLIGENCE AND INDUSTRY APPLICATION (AASRI-AIIA 2011), VOL 1, 2011, : 337 - 341
  • [33] HyperLink NAND flash architecture for mass storage applications
    Schuetz, Roland
    Oh, HakJune
    Kim, Jin-Ki
    Pyeon, Hong-Beom
    Przybylski, Steven A.
    Gillingham, Peter
    2007 22ND IEEE NON-VOLATILE SEMICONDUCTOR MEMORY WORKSHOP, 2007, : 3 - +
  • [34] SRFTL: An Adaptive Superblock-based Real-time Flash Translation Layer for NAND Flash Memory
    Li, Xin
    Shen, Zhaoyan
    Ju, Lei
    Jia, Zhipeng
    2014 IEEE INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, 2014 IEEE 6TH INTL SYMP ON CYBERSPACE SAFETY AND SECURITY, 2014 IEEE 11TH INTL CONF ON EMBEDDED SOFTWARE AND SYST (HPCC,CSS,ICESS), 2014, : 332 - 339
  • [35] A dynamically re-configurable GUI architecture
    Talevski, A
    Chang, E
    WORLD MULTICONFERENCE ON SYSTEMICS, CYBERNETICS AND INFORMATICS, VOL XVII, PROCEEDINGS: CYBERNETICS AND INFORMATICS: CONCEPTS AND APPLICATIONS (PT II), 2001, : 338 - 343
  • [36] GFTL: Group-Level Mapping in Flash Translation Layer to Provide Efficient Address Translation for NAND Flash-Based SSDs
    Pan, Yubiao
    Li, Yongkun
    Zhang, Huizhen
    Chen, Hao
    Lin, Mingwei
    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 2020, 66 (03) : 242 - 250
  • [37] Fast Erase Algorithm using Flash Translation Layer in NAND-Type Flash Memory
    Han, Dae Man
    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 2011, 57 (04) : 1749 - 1755
  • [38] A re-configurable architecture - Radio processor
    Liao, IT
    Lee, TH
    Kang, CC
    Shih, CH
    Tsai, JC
    Lai, HC
    Shen, JH
    Liu, CW
    2003 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS, 2003, : 200 - 203
  • [39] NAND flash memory system based on the Harvard buffer architecture for multimedia applications
    Cheong Ghil Kim
    Kuinam J. Kim
    JungHoon Lee
    Multimedia Tools and Applications, 2015, 74 : 6287 - 6302
  • [40] Workload-Aware Page-Level Flash Translation Layer for NAND Flash-Based Storage Systems
    Wang, Huibing
    Lin, Mingwei
    Xiong, Jinbo
    Lin, Li
    Xiao, Ruliang
    CLOUD COMPUTING AND SECURITY, PT II, 2017, 10603 : 576 - 588
12345