DEMAC: A Modular Platform for HW-SW Co-Design

被引:0
|
作者
Perdomo, Diego A. Roa [1 ]
Kabrick, Ryan [1 ]
Diaz, Jose M. Monsalve [1 ,2 ]
Raskar, Siddhisanket [1 ,2 ]
Fox, Dawson [1 ]
Gao, Guang R. [1 ]
机构
[1] Univ Delaware, Newark, DE 19716 USA
[2] Argonne Natl Lab, Lemont, IL USA
基金
美国国家科学基金会;
关键词
Dataflow Model; Codelet Model; Program Execution Model; DARTS; Many-core architecture; Cluster; Software-Hardware Co-design; FPGA; Exa-scale;
D O I
10.1109/IPDRM51949.2020.00008
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Scientists running applications on high performance computers expect these systems to deliver a high throughput effectively and reliably, while maintaining flexibility, programmability and energy efficiency. Programs are usually translated from a coded language that defines the operation of these systems through a compiler. HPC machines exhibit different features and behaviors based on their architectural characteristics: they could have accelerators or be a collection of computational units with a non-uniform memory access. Aiming to develop a low-cost, flexible and versatile parallel machine for hardware-software co-design of program execution models research, we present DEMAC (the Delaware Modular Assembly Cluster). It provides the necessary tools to develop and test novel features for the next generation of supercomputers. It includes a set of 3D-printed frames that can house several card-sized multi-core embedded systems. Along with a full open source stack, these small computers feature Parallella boards containing a Zynq-7000 series SoC with a dual-core ARM processor and an FPGA that interconnects with a 16-core co-processor called Epiphany. All individual nodes are connected through an Ethernet network. An initial version of a runtime based on Dataflow's Codelet Model is also proposed. This project aims to provide a flexible research platform that could benefit different research labs looking for low-cost parallel platforms.
引用
收藏
页码:25 / 32
页数:8
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