A Novel Voltage Reference With An Improved Folded Cascode Current Mirror OpAmp Dedicated for Energy Harvesting Application

被引:0
|
作者
Li, Xin [1 ]
Kok, Chiang Liang [1 ]
Wu, Chun Dong [1 ]
Sick, Liter [1 ]
Zhu, Di [1 ]
Xiao, Zhe Kai [1 ]
Lim, Wei Meng [1 ]
Goh, Wang Ling [1 ]
机构
[1] Nanyang Technol Univ, VIRTUS IC Design Ctr Excellence, Sch Elect & Elect Engn, 50 Nanyang Ave, Singapore 639798, Singapore
来源
2013 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC) | 2013年
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中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, a CMOS ultra-low voltage reference circuit with ultra-low power consumption of 220nW is proposed. The circuit, simulated in 65nm standard CMOS process technology, operates with a supply voltage of 1V. It is based on sub-threshold MOSFETs using the technique of compensating a PTAT-based variable with the gate source voltage of a subthreshold MOSFET. The novelty of circuit is the use of an improved folded cascode current mirror op-amp operating directly from a 1V power supply. The resulting voltage is equal to the extrapolated threshold voltage of a MOSFET at absolute zero temperature, which was about 435mV for the MOSFETs used. The proposed circuit achieves an average temperature coefficient of 30ppm/degrees C, 12ppm/V in line regulation for a supply voltage range of 0.6-1.2V, and a power supply rejection ratio (PSRR) of - 38dB at 100Hz. The overall power consumption is only 220nW.
引用
收藏
页码:318 / 321
页数:4
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