An experimental investigation of the surface potential in ferroelectric P(VDF-TrFE) FETs

被引:4
|
作者
Rusu, Alexandru [1 ]
Salvatore, Giovanni [1 ]
Ionescu, Adrian [1 ]
机构
[1] Ecole Polytech Fed Lausanne, Nanolab, CH-1015 Lausanne, Switzerland
关键词
PVDF; Ferroelectric; FET; Capacitance; Fabrication; Electrical characterization;
D O I
10.1016/j.mee.2009.10.047
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper we report the fabrication and detailed electrical characterization of a ferroelectric transistor (Fe-FET) aiming at the extraction of its physical threshold voltage. The investigated transistors are fabricated on doped bulk silicon with a gate stack including 10 nm silicon dioxide, 40 nm P(VDF-TrFE) and Au. Based on capacitive measurements, a capacitive divider circuit and a long-channel MOSFET model, we subsequently extract the surface potential psi(S) dependence on the gate voltage and the physical threshold voltage. The experimental data suggest a more abrupt d psi(S)/dV(g) slope, compared with a conventional transistor. A hysteretic behavior, due to the polarization of the P(VDF-TrFE), is observed in the psi(S)-V(g) characteristics. (C) 2009 Elsevier B.V. All rights reserved.
引用
收藏
页码:1607 / 1609
页数:3
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