SP-SVPWM IP Core Design for DC-to-AC Conversion

This paper presents an implementation of a singlephase space vector pulse width modulation (SP-SVPWM) IP1 Core suitable for the design of single-phase DC-to-AC converters (inverters). The SP-SVPWM generation uses a RTL2 approach to leverage the real-time implementation of the major concepts behind the IP Core. The design employs RTL-based modern arithmetic algorithms to allow a sinusoidal variation of the switching pulse which controls the power transistors of a single-phase inverter. The value of the switching period depends on the latency of the arithmetic function blocks. Preliminary results of the use of the IP core deployment in an inverter design, resulted in a less than 1% harmonic distortion.