LEAD: Learning-enabled Energy-Aware Dynamic Voltage/frequency scaling in NoCs

被引:12
|
作者
Clark, Mark [1 ]
Kodi, Avinash [1 ]
Bunescu, Razvan [1 ]
Louri, Ahmed [2 ]
机构
[1] Ohio Univ, Athens, OH 45701 USA
[2] George Washington Univ, Washington, DC USA
来源
2018 55TH ACM/ESDA/IEEE DESIGN AUTOMATION CONFERENCE (DAC) | 2018年
关键词
D O I
10.1145/3195970.3196068
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Network on Chips (NoCs) are the interconnect fabric of choice for multicore processors due to their superiority over traditional buses and crossbars in terms of scalability. While NoC's offer several advantages, they still suffer from high static and dynamic power consumption. Dynamic Voltage and Frequency Scaling (DVFS) is a popular technique that allows dynamic energy to be saved, but it can potentially lead to loss in throughput. In this paper, we propose LEAD- Learning-enabled Energy-Aware Dynamic voltage/frequency scaling for NoC architectures wherein we use machine learning techniques to enable energy-performance trade-offs at reduced overhead cost. LEAD enables a proactive energy management strategy that relies on an offline trained regression model and provides a wide variety of voltage/frequency pairs (modes). LEAD groups each router and the router's outgoing links locally into the same V/F domain, allowing energy management at a finer granularity without additional timing complications and overhead. Our simulation results using PARSEC and Splash-2 benchmarks on a 4 x 4 concentrated mesh architecture show an average dynamic energy savings of 17% with a minimal loss of 4% in throughput and no latency increase.
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页数:6
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