Scheduling flexible flow shops with sequence-dependent setup effects

This paper presents a Lagrangian relaxation-based approach for production scheduling of flexible flow shops (PSFFS) where sequence-dependent setup effects (time and cost) are significant. The approach exploits the idea that scheduling the production of individual parts without considering machine setup effects and scheduling the use of a machine to process a given set of parts are both simpler than PSFFS with setup effects. Since the setup of each machine must match its processing of parts, in a feasible solution to PSFFS, the part production and machine usage schedules must be synchronized. PSFFS is first formulated as a separable integer programming problem with synchronization constraints between part production and machine usage scheduling variables. Lagrangian relaxation is then applied to synchronization constraints, and the scheduling problem is decomposed into two classes of subproblems: part production and machine scheduling subproblems. In these subproblems, there are network flow structures in the equality constraints describing machine status change and production flow balance. Our iterative solution algorithm applies a minimum cost network flow algorithm to solving individual subproblems and adopts an efficient surrogate subgradient method of Luh et al. (1997) to optimize Lagrangian multipliers. A machine availability-searching heuristic finally adjusts the solution to satisfy all synchronization constraints by exploiting the network structure, economic interpretation of Lagrangian multipliers, and the slack time policy. Numerical results of 16 cases, each having 20 test problems, demonstrate that differences between the schedules obtained by our approach and the true optima are on average within 15%. CPU times spent are all less than 17 min on a Pentium-II personal computer. Among the problem dimension factors, the number of part types has the most significant effect on both optimality and computation efficiency. Application of the methodology to daily scheduling of a realistic integrated circuit testing facility of 30 machines takes about 6 min of CPU time to generate a near-optimal solution.