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- [21] Opportunities and challenges of FinFET as a device structure candidate for 14nm node CMOS Technology CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE 2011 (CSTIC 2011), 2011, 34 (01): : 81 - 86
- [23] Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node PROCEEDINGS OF THE 2022 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2022), 2022, : 1083 - 1084
- [24] Impact on Gate Oxide material of Inverted 'T' Junctionless FinFET at 22 nm Technology node 2017 1ST INTERNATIONAL CONFERENCE ON ELECTRONICS, MATERIALS ENGINEERING & NANO-TECHNOLOGY (IEMENTECH), 2017,
- [26] Single event response of ferroelectric spacer engineered SOI FinFET at 14 nm technology node Scientific Reports, 13
- [27] STUDY OF POLY ETCH FOR PERFORMANCE IMPROVEMENT WITH ALTERNATIVE SPIN-ON MATERIALS IN FINFET TECHNOLOGY NODE 2017 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC 2017), 2017,
- [28] Latchup in Bulk FinFET Technology 2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2017,
- [29] Analysis of FinFET technology on memories 2012 IEEE 18TH INTERNATIONAL ON-LINE TESTING SYMPOSIUM (IOLTS), 2012, : 169 - 169
- [30] FinFET technology for future microprocessors 2003 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, 2003, : 33 - 34