共 50 条
- [1] A High Performance Parallel VLSI Design of Matrix Inversion PROCEEDINGS OF 2015 IEEE 11TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2015,
- [2] A statistical approach to electromigration design for high performance VLSI STRESS INDUCED PHENOMENA IN METALLIZATION - FOURTH INTERNATIONAL WORKSHOP, 1998, (418): : 495 - 504
- [4] VLSI architecture and design for high performance adaptive video scaling ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4: IMAGE AND VIDEO PROCESSING, MULTIMEDIA, AND COMMUNICATIONS, 1999, : 406 - 409
- [5] Timing optimization algorithm for design of high performance VLSI systems ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 4, 1996, : 465 - 468
- [7] An automatic validation methodology for logic BIST in high performance VLSI design 2000 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS, 2000, : 473 - 478
- [9] VLSI implementation of the high performance data path design in VLIW processor Tien Tzu Hsueh Pao/Acta Electronica Sinica, 2003, 31 (11): : 1667 - 1670