A fast evaluation of power delivery system input impedance of printed circuit boards with decoupling capacitors

被引：1
|
作者：
Zhao, J [1 ]
Mandhana, OP [1 ]
机构：
[1] Sigr Inc, Santa Clara, CA 95051 USA
来源：
ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING | 2004年
关键词：
D O I：
10.1109/EPEP.2004.1407560
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A fast power delivery system input impedance evaluation methodology for printed circuit board decoupling capacitor placement study is presented in this paper. The methodology is based on electrical network admittance matrix properties. The admittance matrix methodology described in this paper is rigorously validated by comparing the decoupling capacitor placement evaluation of a real printed circuit board by both impedance matrix and results from commercial electromagnetic field software.
引用
收藏
页码：111 / 114
页数：4
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