Parallel implementation of self-organizing map on the partial tree shape neurocomputer

被引：7

作者：

Kolinummi, P ^{[1
]}

Pulkkinen, P ^{[1
]}

Hämäläinen, T ^{[1
]}

Saarinen, J ^{[1
]}

机构：

[1] Tampere Univ Technol, Signal Proc Lab, FIN-33720 Tampere, Finland

来源：

NEURAL PROCESSING LETTERS | 2000年 / 12卷 / 02期

基金：

芬兰科学院;

关键词：

computer architecture; neurocomputer; parallel hardware implementation; parallel mapping; self-organizing map;

D O I：

10.1023/A:1009665814041

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

A parallel mapping of self-organizing map (SOM) algorithm is presented for a partial tree shape neurocomputer (PARNEU). PARNEU is a general purpose parallel neurocomputer that is designed for soft computing applications. Practical scalability and a reconfigurable partial tree network are the main architectural features. The presented neuron parallel mapping of SOM with on-line learning illustrates a parallel winner neuron search and a coordinate transfer that are performed in the partial tree network. Phase times are measured to analyse speedup and scalability of the mapping. The performance of the learning phase in SOM with a four processor PARNEU configuration is about 26 MCUPS and the recall phase performs 30 MCPS. Compared to other mappings done for general purpose neurocomputers, PARNEU's performance is very good.

引用

页码：171 / 182

页数：12

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