Hardware Software Partitioning of Task Graph Using Genetic Algorithm

被引：0
|
作者：
Mishra, Ashish [1 ]
Vakharia, Dhruv [1 ]
Hati, Anirban Jyoti [1 ]
Raju, Kota Solomon [2 ]
机构：
[1] BITS Pilani, Dept Elect & Elect Engn EEE, Pilani 333031, Rajasthan, India
[2] CSIR CEERI, Digital Syst Grp, Pilani, Rajasthan, India
来源：
2014 RECENT ADVANCES AND INNOVATIONS IN ENGINEERING (ICRAIE) | 2014年
关键词：
Partitioning; Scheduling; Hardware Software Co-deign optimization;
D O I：
暂无
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
One of the addressable problem in the hardware software co-design is partitioning of functionality on CPU and ASIC/FPGA. The partitioning phase requires the decision for mapping and scheduling of application given as task graphs on a given CPU/ASIC combination. Hardware software partitioning is one of the critical steps to decide which components can be implemented in hardware and which ones implemented in software so that overall system is optimized. Based on a task graph model, this paper presents the optimum solution of problem using genetic algorithm techniques. Experimental results demonstrate that this method can achieve optimized partitioning in terms of cost and delay. A trade off between cost and delay has also been achieved to get the best possible solution.
引用
下载
收藏
页数：5
相关论文
共 50 条
  • [41] Genetic algorithm driven hardware-software partitioning for dynamically reconfigurable embedded systems
    Harkin, J
    McGinnity, TM
    Maguire, LP
    MICROPROCESSORS AND MICROSYSTEMS, 2001, 25 (05) : 263 - 274
  • [42] A Novel Hardware/Software Partitioning Technique for System-on-Chip in Dynamic Partial Reconfiguration Using Genetic Algorithm
    Janakiraman, N.
    Kumar, Nirmal P.
    PROCEEDINGS OF THE SECOND INTERNATIONAL CONFERENCE ON SOFT COMPUTING FOR PROBLEM SOLVING (SOCPROS 2012), 2014, 236 : 83 - 91
  • [43] A hardware/software partitioning method based on graph convolution network
    Zheng, Xin
    Liang, Shouzhi
    Xiong, Xiaoming
    DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, 2021, 25 (04) : 325 - 351
  • [44] Heterogeneous Hardware-Software System partitioning using Extended Directed Acyclic Graph
    Jin, M
    Khan, GN
    PARALLEL AND DISTRIBUTED COMPUTING SYSTEMS, PROCEEDINGS, 2003, : 181 - 186
  • [45] A hardware/software partitioning method based on graph convolution network
    Xin Zheng
    Shouzhi Liang
    Xiaoming Xiong
    Design Automation for Embedded Systems, 2021, 25 : 325 - 351
  • [46] Task Scheduling Prediction Algorithms for Dynamic Hardware/Software Partitioning
    Quan Haojun
    Zhang Tao
    Guo Jichang
    2012 FIFTH INTERNATIONAL SYMPOSIUM ON PARALLEL ARCHITECTURES, ALGORITHMS AND PROGRAMMING (PAAP), 2012, : 80 - 85
  • [47] Integrate binary mapping into task scheduling for hardware/software partitioning
    Peng, YP
    Ming, L
    2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS, 2004, : 1396 - 1399
  • [48] A hybrid memetic algorithm for solving hardware/software partitioning
    Department of Mathematics, Minjiang University, No. 1, Wenxian Road, Fuzhou, China
    ICIC Express Lett Part B Appl., 3 (811-816):
  • [49] PACE: A dynamic programming algorithm for hardware/software partitioning
    Knudsen, PV
    Madsen, J
    FOURTH INTERNATIONAL WORKSHOP ON HARDWARE/SOFTWARE CO-DESIGN (CODES/CASHE '96), PROCEEDINGS, 1996, : 85 - 92
  • [50] Study on Hardware Software Partitioning using Immune Algorithm and its Convergence Property
    Liu, Yang
    Li, Qing Cheng
    Liu, Jia Xing
    Ma, Jie
    2009 IEEE INTERNATIONAL CONFERENCE ON INTELLIGENT COMPUTING AND INTELLIGENT SYSTEMS, PROCEEDINGS, VOL 3, 2009, : 4 - 8
12345