Real-time simulation of permanent magnet motor drive on FPGA chip for high-bandwidth controller tests and validation

Presented is a real-time simulator of a permanent magnet synchronous motor (PMSM) drive implemented on an FPGA card. Real-time simulation of PMSM drives enable thorough testing of control strategies and rapid deployment of vehicular or industrial applications. The PMSM model is based on Park transform with a reference frame on the rotor and assumes sinusoidal flux induction. A 3-phase IGBT inverter drives the PMSM machine. Both models are implemented with the RT-LAB real-time simulation platform of Opal-RT Technologies using a Simulink blockset called Xilinx System Generator (XSG,), and without any VHDL coding. The paper explains various aspects of the design of the motor drive models in fixed-point representation in XSG, as well as actual simulation validation against a standard PMSM drive model built in Simulink. The PMSM drive, along with a test source for the pulse width modulation, is coded for an FPGA card. The model has user-selectable dead time, modulation index, source angle offset, and frequency. The overall model compilation and simulation is entirely automated by RT-LAB. The drive can also run in a closed loop with a controller executing on a CPU of a real-time simulator. The final PMSM drive model runs with a 20-ns integration time step, allows for time multiplexing of d-q values, and has an I/O latency of 310 ns (250 ns for the PMSM machine alone). The drive is directly connected to RT-LAB digital inputs and analog outputs (1 microsecond settling time) on the FPGA card and has a resulting total hardware-in-the-loop latency of 1.31 microseconds.