Dynamic power-supply and well noise measurement and analysis for high frequency body-biased circuits

被引：18

作者：

Shimazaki, K ^{[1
]}

Nagata, M ^{[1
]}

Okumoto, T ^{[1
]}

Hirano, S ^{[1
]}

Tsujikawa, H ^{[1
]}

机构：

[1] Matsushita Elect Ind Co Ltd, Kyoto 6178520, Japan

来源：

2004 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2004年

关键词：

D O I：

10.1109/VLSIC.2004.1346516

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Dynamic noises on power-supply as well as multiple wells necessary for body-biased circuits show frequency components strongly characterized by the interaction of circuit operation and AC transfer of biasing networks. Measurements with the resolution of 100-ps and 100-uV for a few 100-ns and 1-V ranges on multiple points in a product register file are performed at various operating frequencies up to 400 MHz and show the noises clearly emphasized in frequency domain by the interaction. A proposed analysis flow recruiting a fast SPICE simulator and parasitic extractors can predict the dynamic noises due to combined power supply, ground, well, and substrate interactions, and provide robustness to the design of body-bias control circuitry.

引用

页码：94 / 97

页数：4

共 50 条

[1] Dynamic power-supply and well noise measurements and analysis for low power body biased circuits
Shimazaki, K
Nagata, M
Okumoto, T
Hirano, S
Tsujikawa, H
IEICE TRANSACTIONS ON ELECTRONICS, 2005, E88C (04): : 589 - 596
[2] ACCURATE GATE DELAY EXTRACTION FOR TIMING ANALYSIS OF BODY-BIASED CIRCUITS
Baek, Donkyu
Shin, Insup
Shin, Youngsoo
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2013, 22 (08)
[3] Impact of power-supply noise on timing in high-frequency microprocessors
Saint-Laurent, M
Swaminathan, M
IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2004, 27 (01): : 135 - 144
[4] Impact of power-supply noise on timing in high-frequency microprocessors
Saint-Laurent, M
Swaminathan, M
ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2002, : 261 - 264
[5] POWER-SUPPLY TO CIRCUITS AT A HIGH DC POTENTIAL
GRYAZNOV, SN
VAKHNIN, EA
TIKHONOV, VN
INSTRUMENTS AND EXPERIMENTAL TECHNIQUES, 1983, 26 (03) : 634 - 636
[6] Framework for Dynamic Estimation of Power-Supply Noise and Path Delay
Rao, Sushmita Kadiyala
Robucci, Ryan
Patel, Chintan
PROCEEDINGS OF THE 2013 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFTS), 2013, : 272 - 277
[7] Analysis and Implementation of a Minimum-Supply Body-Biased CMOS Differential Amplifier Cell
Grasso, Alfio Dario
Monsurro, Pietro
Pennisi, Salvatore
Scotti, Giuseppe
Trifiletti, Alessandro
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2009, 17 (02) : 172 - 180
[8] HIGH-FREQUENCY CONVERTER FOR POWER-SUPPLY APPLICATIONS
CONTINO, JS
CIELO, JR
IEEE TRANSACTIONS ON MAGNETICS, 1972, MAG8 (03) : 384 - 386
[9] ANALYSIS OF POWER SUPPLY NOISE MITIGATION CIRCUITS
Charania, Tasreen
Chuang, Pierce
Opal, Ajoy
Sachdev, Manoj
2011 24TH CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (CCECE), 2011, : 1250 - 1255
[10] Power supply noise analysis in DSM circuits
He Jianchun
Jia Lixin
Liu Sheng
IEEE 2007 INTERNATIONAL SYMPOSIUM ON MICROWAVE, ANTENNA, PROPAGATION AND EMC TECHNOLOGIES FOR WIRELESS COMMUNICATIONS, VOLS I AND II, 2007, : 1416 - 1419

← 1 2 3 4 5 →