A layered adaptive verification platform for simulation, test, and emulation

被引：4
|
作者：
Zambaldi, M [1 ]
Ecker, W [1 ]
Henftling, R [1 ]
Bauer, M [1 ]
机构：
[1] Infineon Technol, Munich, Germany
来源：
IEEE DESIGN & TEST OF COMPUTERS | 2004年 / 21卷 / 06期
关键词：
D O I：
10.1109/MDT.2004.73
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This adaptive architecture of structuring testbenches accommodates various models of a design, from transaction to silicon. Moreover,the adapter-based architecture supports the execution of design models on different simulators (high level RTL gate level and switch level) hardware emulators (the testbench runs entirely on the emulator), and even testers.
引用
收藏
页码：464 / 471
页数：8
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