An Integrated Circuit Design of High Efficiency Parallel-SSHI Rectifier for Piezoelectric Energy Harvesting

This paper presents the design and implementation of a rectifier for piezoelectric energy harvesting based on the parallel-synchronized-switch harvesting-on-inductor (P-SSHI) technique, also known as bias flip circuit[ 1]. The circuit is implemented with 0.25 mu m CMOS high voltage process with only 0.9648 mm(2) chip area. Post-layout simulation of the circuit shows the circuit extracts 336% more power compared with the full-bridge rectifier. The system's average control power loss is 26 mu W while operating with a self-made MEMS piezoelectric transducer with output current 25 mu A 120Hz and internal capacitance 6.45nF. The output power is 43.42 mu W under optimal load of 1.5 M Omega.