A 0.1-28 GHz Differential Cascaded Distributed Amplifier in 0.18-μ m CMOS Technology

This paper uses the concept of a three-resonant amplifier to design a differential distributed amplifier. The wideband gain is implemented by using different resonant frequencies. The matching circuits are designed by using the parasitic capacitance between inductance and transistors. The circuit is implemented by CMOS 0.18-mu m supplied by Taiwan Semiconductor Manufacturing Co., Ltd. We draw the inductance to replace transmission line as the matching networks. Moreover, the method of 3-port inductors is used to merge two adjacent inductors by mutual inductance, and the response is the same as the original circuit. The measurement results of this amplifier show that the minimum gain is 17 dB over the designed frequencies of 0.1-28 GHz. The input and output losses are about 10 dB with the chip size of 0.84 mm2 including the RF and DC pads, and the power consumption of this proposed differential cascaded distributed amplifier is 200 mW.