A study of UDP and TCP FPGA implementation for data acquisition system

被引:4
|
作者
Zhang, F. [1 ,3 ]
Wang, N. [3 ,4 ]
Hu, Z. [1 ,4 ]
Wu, M. [3 ]
Wang, D. [2 ]
Zhou, Z. [3 ,4 ]
Wang, Y. [1 ,4 ]
机构
[1] Hubei Univ Technol, Hubei Power Grid Intelligent Control & Equipment, 28 Nanli Rd, Wuhan 430068, Peoples R China
[2] Cent China Normal Univ, 152 Luoyu Rd, Wuhan 430079, Peoples R China
[3] Hubei Univ Technol, Hubei Collaborat Innovat Ctr High Efficiency Util, 28 Nanli Rd, Wuhan 430068, Peoples R China
[4] Hubei Univ Technol, Sch Elect & Elect Engn, Hubei Key Lab High Efficiency Utilizat Solar Ener, 28 Nanli Rd, Wuhan 430068, Peoples R China
基金
中国国家自然科学基金;
关键词
Data acquisition circuits; Data acquisition concepts; Detector control systems (detector and experiment monitoring and slow-control systems; architecture; hardware; algorithms; databases); Front-end electronics for detector readout; READOUT; ELECTRONICS;
D O I
10.1088/1748-0221/16/07/P07044
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
Two main protocol stacks for gigabit ethernet are currently widely adopted in the data acquisition system for high energy physics experiments. The first method is based on User Datagram Protocol (UDP), which transfer packets before an agreement is provided by the receiving party. However, the second method, called Transmission Control Protocol (TCP), establishes a connection through a process of the three-way handshake. We designed two FPGA projects, based on UDP and TCP respectively, on such a real application as ethernet communication module for ALICE calorimeters. The test of both projects is carried out on the same Xilinx Virtex-6 FPGA board, and data is captured through a professional network protocol analyzer. We analyzed the implementation methods and complexity, the variation patterns of data throughput, and the resource utilization of the two designs. The findings obtained under the same application scenario and test platform not only reveals the variation rule of actual data throughput, but also proved that the TCP would require twice as much FPGA resource for implementation as the UDP.
引用
收藏
页数:15
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