Fabrication of 1K-bit 1T2C-type ferroelectric memory cell array

被引：0
|
作者：
Yamamoto, S
Ishikawa, T
Fuchikami, T
Kim, HS
Aizawa, K
Park, BE
Furukawa, T
Ohki, H
Kikuchi, S
Hoko, H
Ishiwara, H
机构：
[1] Tokyo Inst Technol, Interdisciplinary Grad Sch Sci & Engn, Dept Adv Appl Elect, Midori Ku, Yokohama, Kanagawa 2268502, Japan
[2] R&D Assoc Future Electron Devices, Minato Ku, Tokyo 1050001, Japan
[3] Tokyo Inst Technol, Precis & Intelligence Lab, Midori Ku, Yokohama, Kanagawa 2268503, Japan
来源：
INTEGRATED FERROELECTRICS | 2004年 / 67卷
关键词：
ferroelectric random access memory (FeRAM); non-destructive readout; cell array;
D O I：
10.1080/10584580490899389
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 1K-bit IT2C-type ferroelectric memory array has been designed and fabricated by combination of a 0.35 mum gate length CMOS process and a 3 mum design rule ferroelectric process. The write and readout operation in a 1K-bit 1T2C-type memory array cell has been continued experimentally.
引用
收藏
页码：281 / 286
页数：6
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