Security Risk Assessment of Server Hardware Architectures using Graph Analysis

被引:0
|
作者
Koteshwara, Sandhya [1 ]
机构
[1] IBM TJ Watson Res Ctr, Yorktown Hts, NY 10598 USA
关键词
Hardware Security; Security Risk Assessment; Hard-ware Security Metrics;
D O I
10.1109/ASIANHOST53231.2021.9699554
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The growing complexity of server architectures, which incorporate several components with state, has necessitated rigorous assessment of the security risk both during design and operation. In this paper, we propose a novel technique to model the security risk of servers by mapping their architectures to graphs. This allows us to leverage tools from computational graph theory, which we combine with probability theory for deriving quantitative metrics for risk assessment. Probability of attack is derived for server components, with prior probabilities assigned based on knowledge of existing vulnerabilities and countermeasures. The resulting analysis is further used to compute measures of impact and exploitability of attack. The proposed methods are demonstrated on two open-source server designs with different architectures.
引用
收藏
页数:4
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