Hardware implementation issues of a BMS decoding approach for AG based codes

被引：0
|
作者：
Belkoura, Z [1 ]
Naviner, LAD [1 ]
机构：
[1] Tech Univ Berlin, Inst Telekommunikationssyst, Fachgebiet Nachrichtenbertragung, D-10587 Berlin, Germany
来源：
WCNC 2003: IEEE WIRELESS COMMUNICATIONS AND NETWORKING CONFERENCE RECORD, VOLS 1-3 | 2003年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Algebraic-geometry family of codes contains sequences with excellent asymptotic behaviour, but only few pieces of work have treated their hardware implementation. In this paper, we investigate an algorithm for decoding AG codes from the hardware feasibility point of view. We modify the original strategy in order to obtain a new structure more suitable for hardware implementation.
引用
收藏
页码：448 / 453
页数：6
相关论文
共 50 条
  • [41] Parallel List Decoding of Convolutional Codes: Algorithm and Implementation
    Wang, Jian
    Korb, Matthias
    Zhang, Kangli
    Kroll, Harald
    Huang, Qiuting
    Wei, Jibo
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64 (10) : 2806 - 2817
  • [42] Hardware Implementation of a Reed-Solomon Soft Decoder based on Information Set Decoding
    Scholl, Stefan
    Wehn, Norbert
    2014 DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION (DATE), 2014,
  • [43] IMPLEMENTATION OF MICROPROCESSORS IN TRELLIS DECODING OF CONVOLUTIONAL-CODES
    RASHVAND, HF
    ELECTRONICS LETTERS, 1982, 18 (03) : 121 - 123
  • [44] Soft syndrome iterative decoding of quantum LDPC codes and hardware architectures
    Nithin Raveendran
    Javier Valls
    Asit Kumar Pradhan
    Narayanan Rengaswamy
    Francisco Garcia-Herrero
    Bane Vasić
    EPJ Quantum Technology, 2023, 10
  • [45] A Survey on Decoding Schedules of LDPC Convolutional Codes and Associated Hardware Architectures
    Ben Thameur, Hayfa
    Le Gal, Bertrand
    Khouja, Nadia
    Tlili, Fethi
    Jego, Christophe
    2017 IEEE SYMPOSIUM ON COMPUTERS AND COMMUNICATIONS (ISCC), 2017, : 898 - 905
  • [46] Soft syndrome iterative decoding of quantum LDPC codes and hardware architectures
    Raveendran, Nithin
    Valls, Javier
    Pradhan, Asit Kumar
    Rengaswamy, Narayanan
    Garcia-Herrero, Francisco
    Vasic, Bane
    EPJ QUANTUM TECHNOLOGY, 2023, 10 (01)
  • [47] Implementation Aspects of a Pipeline ADMM-based LP Decoding of LDPC Convolutional Codes
    Ben Thameur, Hayfa
    Le Gal, Bertrand
    Khouja, Nadia
    Tlili, Fethi
    Jego, Christophe
    2018 IEEE WIRELESS COMMUNICATIONS AND NETWORKING CONFERENCE (WCNC), 2018,
  • [48] Novel hardware implementation for generating message authentication codes
    Michail, H.E.
    Kakarountas, A.P.
    Fotopoulou, E.
    Goutis, C.E.
    WSEAS Transactions on Communications, 2005, 4 (11): : 1276 - 1283
  • [49] Hardware Implementation of a Soft Cancellation Decoder for Polar Codes
    Berhault, Guillaume
    Leroux, Camille
    Jego, Christophe
    Dallet, Dominique
    PROCEEDINGS OF THE 2015 CONFERENCE ON DESIGN & ARCHITECTURES FOR SIGNAL & IMAGE PROCESSING, 2015, : 72 - 79
  • [50] Hardware Implementation of Cyclic Codes Error Correction on FPGA
    Van-Tinh Nguyen
    Van-Lan Dao
    Thi-Thanh-Dung Phan
    2016 3RD NATIONAL FOUNDATION FOR SCIENCE AND TECHNOLOGY DEVELOPMENT CONFERENCE ON INFORMATION AND COMPUTER SCIENCE (NICS), 2016, : 97 - 100
12345