Embedded genetic algorithm for low-power, low-cost, and low-size-memory devices

This work proposes a strategy to create an embedded genetic algorithms (GAs) for low-power, low-cost, and low-size-memory devices. This strategy aims to provide the means of GAs to run as a low-cost and low-power consumption embedded system, where microcontrollers (mu Cs) are commonly used. The implementation details are presented, emphasizing the limitations and restrictions imposed to turn it more compact and efficient. In addition, data related to the algorithm effectiveness, processing time, and memory consumption were obtained from simulations, oscilloscope measurements, and using the hardware-in-loop technique. Finally, this implementation is compared with other implementation from the literature and the results show that 8-bits mu Cs can run GAs for several practical applications.