AC-Boosting Frequency Compensation with Double Pole-Zero Cancellation for Multistage Amplifiers

被引：3
|
作者：
Tan, M. T. [1 ]
Chan, P. K. [1 ]
Lam, C. K. [1 ]
Ng, C. W. [1 ]
机构：
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore, Singapore
来源：
CIRCUITS SYSTEMS AND SIGNAL PROCESSING | 2010年 / 29卷 / 05期
关键词：
Frequency compensation; Amplifier; Pole-zero cancellation; Integrated circuits; NESTED MILLER COMPENSATION; OPERATIONAL-AMPLIFIER;
D O I：
10.1007/s00034-010-9180-x
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, we present an AC-boosting compensation topology with double pole-zero cancellation (ACBC-DPZ) for a multistage amplifier driving a very large capacitive load. The proposed technique modifies the original AC-boosting compensation (ACBC) topology to increase the power-bandwidth efficiency and reduce the size for the output power transistor and compensation capacitor. Simulation results show that the ACBC-DPZ amplifier using a CSM 0.18 mu m CMOS process can achieve a unity gain bandwidth of 14 MHz and an average slew rate of 3.88 V/mu s at 1500 pF load. The amplifier dissipates 2.55 mW at a 1.8 V supply.
引用
收藏
页码：941 / 951
页数：11
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