New wave front phase sensor used for 3D shape measurements of patterned silicon wafers

On product overlay (OPO) is one of the most critical parameters for the continued scaling according to Moore's law. Without good overlay between the mask and the silicon wafer inside the lithography tool, yield will suffer(1). As the OPO budget shrinks, non-lithography process induced stress causing in plane distortions (IPD) becomes a more dominant contributor to the shrinking overlay budget(2). To estimate the process induced in-plane wafer distortion after cucking the wafer onto the scanner board, a high-resolution measurement of the freeform wafer shape of the unclamped wafer with the gravity effect removed is needed. Measuring both intra and inter die wafer distortions, a feed-forward prediction algorithm, as has been published by ASML, minimizes the need for alignment marks on the die and wafer and can be performed at any lithography layer(3). Up until now, the semiconductor industry has been using Coherent Gradient Sensing (CGS) interferometry or Fizeau interferometry to generate the wave front phase from the reflecting wafer surface to measure the free form wafer shape(3,4). In this paper, we present a new method to generate a very high-resolution wave front phase map of the reflected light from a patterned silicon wafer surface that can be used to generate the free form wafer shape. We show data using a WFPI patterned wafer geometry tool to acquire 3.4 million data points on a 200mm patterned silicon wafer with 96 mu m spatial resolution with a data acquisition time of 5 seconds.