Fine-Grain Power Management in Manycore Processor and System-on-Chip (SoC) Designs

被引:0
|
作者
De, Vivek [1 ]
机构
[1] Intel Corp, Intel Labs, Hillsboro, OR 97124 USA
关键词
Manycore processor; power management; NTV; SoC; voltage regulator;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Circuit and design techniques for fine-grain power management in manycore System-on-Chip (SoC) are presented. Recent advances in dynamic platform control techniques to enable (1) independent voltage-frequency domains, (2) dynamic power budget allocation to various blocks depending on workload, (3) fast dynamic voltage-frequency scaling and (4) fast activation and shutdown, are described. Future challenges and opportunities for complex manycore SoC designs with wide dynamic power-performance range, including near-threshold-voltage (NTV) operation, are summarized. Future trends in multi-voltage designs with integrated voltage regulators are highlighted.
引用
下载
收藏
页码:159 / 164
页数:6
相关论文
共 50 条
  • [41] Dynamic fine-grain power gating design in WiNoC
    Ouyang Yiming
    Hu Lizhu
    Wu Yifeng
    Yang Jianfeng
    Xingkun
    2018 IEEE 27TH ASIAN TEST SYMPOSIUM (ATS), 2018, : 139 - 148
  • [42] POWER CHARACTERISATION FOR THE FABRIC IN FINE-GRAIN RECONFIGURABLE ARCHITECTURES
    Becker, Tobias
    Jamieson, Peter
    Luk, Wayne
    Cheung, Peter Y. K.
    Rissa, Tero
    2009 5TH SOUTHERN CONFERENCE ON PROGRAMMABLE LOGIC, PROCEEDINGS, 2009, : 77 - +
  • [43] An integrated fine-grain runtime system for MPI
    Humaira Kamal
    Alan Wagner
    Computing, 2014, 96 : 293 - 309
  • [44] An integrated fine-grain runtime system for MPI
    Kamal, Humaira
    Wagner, Alan
    COMPUTING, 2014, 96 (04) : 293 - 309
  • [45] Asynchronous Fine-Grain Power-Gated Logic
    Chang, Meng-Chou
    Chang, Wei-Hsiang
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2013, 21 (06) : 1143 - 1153
  • [46] TweeLoc: A System for Geolocalizing Tweets at Fine-Grain
    Paraskevopoulos, Pavlos
    Pellegrini, Giovanni
    Palpanas, Themis
    2017 17TH IEEE INTERNATIONAL CONFERENCE ON DATA MINING WORKSHOPS (ICDMW 2017), 2017, : 1178 - 1183
  • [47] Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications
    Milojevic, Dragomir
    Montperrus, Luc
    Verkest, Diederik
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2009, 57 (02): : 139 - 153
  • [48] Security Assurance for System-on-Chip Designs With Untrusted IPs
    Basak, Abhishek
    Bhunia, Swarup
    Tkacik, Thomas
    Ray, Sandip
    IEEE TRANSACTIONS ON INFORMATION FORENSICS AND SECURITY, 2017, 12 (07) : 1515 - 1528
  • [49] Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications
    Dragomir Milojevic
    Luc Montperrus
    Diederik Verkest
    Journal of Signal Processing Systems, 2009, 57 : 139 - 153
  • [50] Reuse-based methodology in developing System-on-Chip (SoC)
    Chang, Soo Ho
    Kim, Soo Dong
    FOURTH INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING RESEARCH, MANAGEMENT AND APPLICATIONS, PROCEEDINGS, 2006, : 125 - +