The design of reliable controller for interprocessor communication network using ATM switch

被引：0

作者：

Park, HS ^{[1
]}

Moon, SJ ^{[1
]}

Park, MS ^{[1
]}

Kwon, B ^{[1
]}

Song, KS ^{[1
]}

机构：

[1] Elect & Telecommun Res Inst, Yusong Gu, Taejon 305350, South Korea

来源：

PROCEEDINGS OF THE THIRTY-FIRST HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES, VOL III: EMERGING TECHNOLOGIES TRACK | 1998年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes the design of reliable controller for interprocessor communication network (IPCN), which sends and receives information among processors through asynchronous transfer mode(ATM) switches. Hardware mainly is composed of a transmitting section, in which messages are decomposed into cells, and a receiving section, which cells are assembled into messages. Software composed of an interface section for communicating with all application program and a driver section for driving IPC control device. The IPC controller is doubly designed, so it is possible to provides continuous service for the system when upgrading or changing the software. ATM adaptation layer (AAL) type 5 is used for the format of IPC messages. IPC header information as well as additional information for routing of ATM cells are also used. This paper also presents characteristics and requirements for IPC through ATM switch, and computes message error rate and message retransmission rate with varying user message size. Finally, this paper derives the equation of the optimal message length considering retransmission.

引用

页码：263 / 272

页数：10

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