Calibration based methods for substrate modeling and noise analysis for mixed-signal SoCs

被引：1
|
作者：
Debnath, Sankar P. [1 ]
Kumar, Ganesh P. [1 ]
Jairam, S. [2 ]
机构：
[1] WSG Texas Instruments, Bangalore, Karnataka, India
[2] SoCCoE Texas Instruments, Bangalore, Karnataka, India
来源：
20TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: TECHNOLOGY CHALLENGES IN THE NANOELECTRONICS ERA | 2007年
关键词：
D O I：
10.1109/VLSID.2007.48
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A novel and an extremely fast substrate model creation and noise analysis methodology is presented The method takes a prototype floorplan or layout as an input and outputs a detailed 2-D plot of the noise voltage distribution at the surface. Estimated noise injection is attached to a substrate model to compute noise distribution across the die. An adaptive finite element based extraction method is described for modeling. The model is then calibrated to an extracted substrate model based on various parameters like surface and bulk resistivity. The method is optimized for both accuracy and speed. It is also shown how a designer can perform various what-if analysis with this flow in both pre-layout and post-layout phases. Grounding schemes and isolation structures are then discussed with various what-if analysis. Finally simulation data and results from an actual design are shown where this methodology has been applied.
引用
收藏
页码：887 / +
页数：2
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