The CMOS on-chip oscillator based on level tracking technique

In this paper, we propose the architecture of a CMOS Fully integrated level-locked loop (LLL). A 455KHz LLL without external reference signal achieves the target of I percent variation, and consumes 9mW with 3.6V power supply in standard 0.5mum CMOS process. The frequency-to-voltage converter (FVC) in LLL built upon charge redistribution principle can decrease the variation of process. A programmable controller is developed to increase the frequency accuracy. The voltage-controlled oscillator (VCO) is based on differential delay cells in order to minimize the effect of the power supply and the substrate noise. According to main circuits operate in 1.8 V provided by regulator, the output frequency is accurately on 455KHz from 2.0V to 3.6V.