Mechanisms of electrical stress-induced degradation in H2/plasma hydrogenated n- and p-channel polysilicon thin film transistors

The degradation characteristics under various bias stress conditions are systematically investigated in hydrogenated n- and p-channel polysilicon thin film transistors (poly-Si TFTs) with a sidewall spacer. The device characteristics after a relatively long stress in the p-channel TFTs exhibit more serious degradation than those in the n-channel TFTs. Moreover, the stress time dependence of the threshold voltage shift in the form! er devices shows more complicated behavior than that in the latter. These serious and complicated time-dependent degradation characteristics (induced only in p-channel devices) can be explained by the generation of two defect states in which hydrogen plays an important role: one is positively charged traps that correspond to Si+ atoms generated by the injection of H+ ions into the gate oxide near the source and appear after a certain stress time. The other is deep traps that correspond to dangling bonds generated by the dissociation of Si-H bonds at/near the interface near the source and appear after a long stress time.