Performance of FinFET Based Adiabatic Logic Circuits

被引:0
|
作者
Srilakshmi, K. [1 ]
Tilak, A. V. N. [1 ]
Rao, K. Srinivasa [2 ]
机构
[1] Gudlavalleru Engn Coll, Gudlavalleru, India
[2] TRR Coll Engn, Inole, India
关键词
Adiabatic logic; FinFET; Ultralow-power; 4-bit adder; Energy efficiency;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The heat removal becomes a problem in modern VLSI circuits due to increased power dissipation. To limit the power dissipation adiabatic logic is the most widely used design technique than standard CMOS logic as it does not dissipate energy. Till now number of adiabatic logic families had been implemented using bulk CMOS. The leakage power in the scaled down bulk CMOS devices reduces the energy recovery efficiency of adiabatic logic circuits. The power dissipation of different adiabatic logic families with FinFET devices are compared using 4-bit adder. Due to lower leakage current, higher on-state current, and design flexibility of FinFETs, the adiabatic 4-bit adder implemented using FinFET gives up to 97% power reduction over bulk CMOS circuits.
引用
收藏
页码:2377 / 2382
页数:6
相关论文
共 50 条
  • [1] Performance analysis for reliable nanoscaled FinFET logic circuits
    Mushtaq, Umayia
    Sharma, Vijay Kumar
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2021, 107 (03) : 671 - 682
  • [2] Performance analysis for reliable nanoscaled FinFET logic circuits
    Umayia Mushtaq
    Vijay Kumar Sharma
    Analog Integrated Circuits and Signal Processing, 2021, 107 : 671 - 682
  • [3] Performance envelope of Adiabatic Logic Circuits Based on Electrostatic NEM Switches
    Houri, Samer
    Valentian, Alexandre
    Fanet, Herve
    Poulain, Christophe
    2013 IEEE FAIBLE TENSION FAIBLE CONSOMMATION (FTFC), 2013,
  • [4] Power Gating in FinFET Adiabatic Circuits
    Deo, Nikhil
    Mangang, Rusni Kima
    Murugan, Kumar
    2014 INTERNATIONAL CONFERENCE ON GREEN COMPUTING COMMUNICATION AND ELECTRICAL ENGINEERING (ICGCCEE), 2014,
  • [5] Leakage Power Reduction of Adiabatic Circuits Based on FinFET Devices
    Liao, Kai
    Cui, XiaoXin
    Liao, Nan
    Ma, KaiSheng
    IEICE TRANSACTIONS ON ELECTRONICS, 2013, E96C (08): : 1068 - 1075
  • [6] FinFET Based Adiabatic Logic Design for Low Power Applications
    Rao, L. Dileshwar
    Dixit, Soumya
    Pachkor, Kavita
    Aarthy, M.
    2017 INTERNATIONAL CONFERENCE ON MICROELECTRONIC DEVICES, CIRCUITS AND SYSTEMS (ICMDCS), 2017,
  • [7] Design and Performance Analysis of SRAM Circuit Using Adiabatic Logic with FinFET
    Shamsuddoha, A. O. M.
    Islam, Md Khairul
    Biswas, Satyendra N.
    PROCEEDINGS OF INTERNATIONAL CONFERENCE ON ELECTRONICS, COMMUNICATIONS AND INFORMATION TECHNOLOGY 2021 (ICECIT 2021), 2021,
  • [8] Performance Comparison for FinFET Nanoscale Static and Domino Logic Circuits
    Riaz, Anjum
    Sharma, Vijay Kumar
    INTERNATIONAL JOURNAL OF NANOSCIENCE, 2022, 21 (02)
  • [9] Analysis of FinFET-Based Adiabatic Circuits for the Design of Arithmetic Structures
    Bhuvana, B. P.
    Bhaaskaran, V. S. Kanchana
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2020, 29 (01)
  • [10] Performance Analysis of 2N-N-2P Adiabatic Logic Circuits for Low Power Applications using FinFET
    Bhuvana, B. P.
    Bhaaskaran, Kanchana V. S.
    7TH INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING & COMMUNICATIONS (ICACC-2017), 2017, 115 : 166 - 173