An S-Band CMOS 6-Bit Vector-Sum Phase Shifter with Low RMS Phase Error Using Frequency-to-Voltage Converter Feedforward Loop

In this paper, a wideband full-360o phase shifter with 6 bits of accuracy has been designed and simulated with minimal root mean square (RMS) phase error. The proposed phase shifter deployed a feed forward path including a frequency-to-voltage converter (FVC) to minimize the mismatch in quadrature generation to eventually reduce the RMS phase error for S-band (2-4 GHz) applications. The designed phase shifter in 180nm CMOS technology achieves an RMS phase error in the range of 0.607-1.18 similar to with similar to 50 dBm input signal over 2-4 GHz frequency band. With lower input signal of similar to 75 dBm, the RMS phase error is 0.621-1.34 similar to for 2-4 GHz input frequency. The proposed phase shifter shows an RMS amplitude error less than 0.41 dB over 2-4 GHz frequency. The 1-dB compression point (P similar to 1dB;CP) of the proposed phase shifter is similar to 23 dBm. The proposed wideband phase shifter draws 32 mA from 1.8 supply voltage. It occupies an active area of only 0.025mm2, due to active design without any inductor.