Sigma-delta fractional-N frequency synthesis

被引：0
|
作者：
Li, Xiaoji [1 ]
Zheng, Jiyu [1 ]
Zhao, Li [1 ]
机构：
[1] Guilin Univ Elect Technol, Dept Commun & Informat Engn, Guilin, Peoples R China
来源：
2006 10TH INTERNATIONAL CONFERENCE ON COMMUNICATION TECHNOLOGY, VOLS 1 AND 2, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TN [电子技术、通信技术];
学科分类号：
0809 ;
摘要：
In this paper, Based on the equivalence of noise-shaping function between the first order sigma-delta modulator and traditional phase accumulator of fractional-N frequency synthesizer, noise characteristics of the high order delta-sigma modulator is analyzed and experimentally verified. With the influence of the high order delta-sigma modulator, the spurious phase noise introduced by fractional-N division possesses of high-pass characteristics, which can be suppressed by the loop filter of the phase-lock-loop (PLL). A fractional-N frequency synthesizer with the high order delta-sigma modulator is realized using a chip. The working frequency is between 1800 to 1900MHz. The measured phase noise is lower than 80dBc/Hz at 10KHz offset, ultra-small step size is 100 Hz or less and switching times of less 50 mu s, satisfying the requirement of most wireless communication systems.
引用
收藏
页码：1556 / +
页数：2
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