Sigma-delta fractional-N frequency synthesis

In this paper, Based on the equivalence of noise-shaping function between the first order sigma-delta modulator and traditional phase accumulator of fractional-N frequency synthesizer, noise characteristics of the high order delta-sigma modulator is analyzed and experimentally verified. With the influence of the high order delta-sigma modulator, the spurious phase noise introduced by fractional-N division possesses of high-pass characteristics, which can be suppressed by the loop filter of the phase-lock-loop (PLL). A fractional-N frequency synthesizer with the high order delta-sigma modulator is realized using a chip. The working frequency is between 1800 to 1900MHz. The measured phase noise is lower than 80dBc/Hz at 10KHz offset, ultra-small step size is 100 Hz or less and switching times of less 50 mu s, satisfying the requirement of most wireless communication systems.